Receiver of double conversion system

ABSTRACT

A receiver of double conversion system wherein unwanted components included in received signals can be removed without fail and wherein the number of constituent parts has been reduced. The receiver comprises an antenna tuning circuit  10  including a tuning coil  11  and a variable-capacitance diode  13;  a high frequency amplification circuit  20  for performing a high frequency amplification of a signal outputted by the antenna tuning circuit  10;  two-stage mixing circuits  22, 28  for performing two frequency conversions of an output from the high frequency amplification circuit  20;  and a detecting circuit  36  for detecting an output from the latter-stage mixing circuit  28.

TECHNICAL FIELD

The present invention relates to a receiver of double conversion systemfor performing frequency conversion two times.

BACKGROUND ART

A receiver of double conversion system for performing frequencyconversion two times for a received broadcast wave by using two mixingcircuits is conventionally known (for example, see pages 2 to 3, FIGS. 1to 4 of Japanese Patent Laid-Open No. 2000-174653). The first stagemixing circuit converts the broadcast wave to a higher frequency signalso as to enable image interference to be easily removed, as a result ofwhich excellent interference characteristics can be realized with anon-tuning type receiver without an antenna tuning circuit and an RFtuning circuit.

In the above-described patent gazette document, a prior art is alsodisclosed in which the reception sensitivity and the interferencecharacteristic are further improved in the receiver of double conversionsystem by making a signal obtained by applying high frequencyamplification to a broadcast wave received with an antenna tuned beforethe signal is inputted to the first stage mixing circuit. The tuning ofthe signal before it is inputted to the first stage mixing circuit makesit possible to prevent a radio wave of a broadcasting station whosereception is not desired and a noise from entering the first stagemixing circuit.

In the receiver disclosed in Japanese Patent Laid-Open No. 2000-174653described above, however, since the signal received via the antenna ismade to pass the tuning circuit after being subjected to the highfrequency amplification, there is a problem in that unwanted componentssuch as a radio wave of a broadcasting station whose reception is notdesired and a noise, when included in the signal received by theantenna, are also amplified. In the above-described receiver in whichthe tuning circuit is configured by combining a tuning coil with avariable-capacitance diode, the antenna is also separately provided. Forexample, a rod antenna is generally used as the antenna, but in thiscase, there is a problem in that both the rod antenna and the tuningcoil are needed, causing the number of components to be increased.

DISCLOSURE OF THE INVENTION

The present invention has been made in view of the above-describedcircumstances. An object of the present invention is to provide areceiver of double conversion system capable of surely removing unwantedcomponents included in a received signal, and of reducing the number ofcomponents.

In order to solve the above-described problem, according to the presentinvention, there is provided a receiver of double conversion systemcomprising: an antenna tuning circuit including a tuning coil and avariable-capacitance diode; a high frequency amplification circuit forperforming high frequency amplification for a signal outputted from theantenna tuning circuit; first and second mixing circuits for performingfrequency conversion twice for an output of the high frequencyamplification circuit; and a detecting circuit for performing detectionprocessing for an output of the mixing circuits. The double conversionsystem adopted and the antenna tuning circuit provided in a former stageof the high frequency amplification circuit make it possible to surelyremove unwanted components, such as a radio wave of an undesiredbroadcasting station and a noise, etc. which are included in thereceived broadcast wave. Since the tuning coil in the antenna tuningcircuit can be used as an antenna, as compared with the case where thetuning circuit is provided for a subsequent stage of high frequencyamplification circuit, the coil for tuning and the antenna need not beprovided separately, so that the number of components can be reduced.

The above-described first mixing circuit also preferably converts afrequency of a signal outputted from the high frequency amplificationcircuit to a frequency higher than the frequency of the broadcast wave,and the second mixing circuit preferably converts a frequency of asignal outputted from the first mixing circuit to a frequency lower thanthe frequency of the broadcast wave, thereby enabling image interferenceincluded in the received broadcast wave to be easily removed.

The above-described tuning coil included in the antenna tuning circuitis also preferably a bar antenna in which a conducting wire is woundaround a magnetic core. The bar antenna, which is capable of suppressingto minimum the fluctuation of magnetic flux due to the effect of a humanbody, etc. present in the vicinity, makes it possible to stably receivethe broadcast wave. The use of a ferrite core having a large magneticpermeability also makes it possible to obtain a large electromotivevoltage, thereby enabling the reception sensitivity to be improved.

The above-described tuning coil included in the antenna tuning circuitis also preferably a loop antenna in which a conducting wire is wound ina loop shape. The loop antenna can be easily formed by using a casing ofa portable receiver, etc.

The receiver according to the present invention also preferablycomprises: a digital-analog converter for generating a control voltagefor setting a tuning frequency applied to a variable-capacitance diodeincluded in the above-described antenna tuning circuit; a localoscillator for inputting a local oscillation signal whose frequency isvariable to the first mixing circuit to which the output signal of thehigh frequency amplification circuit is inputted; and a control sectionfor setting the frequency of the local oscillation signal outputted fromthe local oscillator, and for generating a frequency setting datarequired for associating the tuning frequency of the antenna tuningcircuit with the frequency of the local oscillation signal, so as toinput the frequency setting data to the digital-analog converter. In thereceiver of double conversion system, in which a frequency of anintermediate frequency signal outputted from the first mixing circuit isoften set near 10 MHz, in the case where the frequency of the broadcastwave (about 500 to 1600 kHz in the case of AM broadcasting) is greatlydifferent from the frequency of the intermediate frequency signal, it isdifficult to change the oscillation frequency of the local oscillatorand the tuning frequency of the antenna tuning circuit in the same wayonly by adding a padding capacitor, etc., as a result of which atracking error exceeds a permissible range. However, in the case wherethe control voltage applied to the variable-capacitance diode isgenerated by using the digital-analog converter, the tuning frequencycan be set arbitrarily regardless of the oscillation frequency of thelocal oscillator, so that the excessive tracking error can be preventedfrom occurring.

The above-described digital-analog converter also preferably allows thecontrol voltage to change with a predetermined temperature coefficientin accordance with ambient temperature. Thereby, expensive componentssuch as the temperature compensating capacitor need not be used, so thatcomponent costs can be reduced.

The above-described digital-analog converter also preferably comprises atemperature coefficient setting section constituted by includingelements having predetermined temperature coefficients, so as to allow adevice constant of the temperature coefficient setting section as awhole to be changed in accordance with ambient temperature. In this way,the provision of the temperature coefficient setting section for a partof the digital-analog converter enables the temperature characteristicof the digital-analog converter as a whole to be arbitrarily set withina predetermined range.

It is also preferred that the above-described digital-analog converter,the high frequency amplification circuit, the first and second mixingcircuits, the detecting circuit and the local oscillator are formed on asame semiconductor substrate, that the temperature coefficient settingsection includes a plurality of resistances which are formed by asemiconductor manufacturing process and which have temperaturecoefficients different to each other, and that a connection form of theplurality of resistances is set so as to make the temperaturecoefficient of the digital-analog converter as a whole reach apredetermined value. Specifically, each of the plurality of resistancesis preferably formed by a poly-silicon on a semiconductor substrate, sothat the temperature coefficient of each resistance is made to bedifferent by adjusting impurity concentration and carrier types of thepoly-silicon. Alternatively, each of the plurality of resistances ispreferably formed by utilizing a p-type region or a n-type region on asemiconductor substrate, so that the temperature coefficient of eachresistance is made to be different by adjusting impurity concentrationand carrier types of the p-type region or the n-type region. In thisway, most of the components including the digital-analog converter canbe formed on a semiconductor substrate, thereby effecting cost reductionin facilitating manufacturing and in reducing the number of components.

The above-described digital-analog converter preferably comprises acurrent source of which current value is set in accordance with a valueof inputted frequency setting data, and the temperature coefficientsetting section into which the current generated by the current sourceflows, so as to output a voltage across the temperature coefficientsetting section as the control voltage. Such configuration of thedigital-analog converter facilitates changing of the output voltage ofthe digital-analog converter (control voltage) in accordance with thetemperature coefficient of the temperature coefficient setting section.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a figure showing a configuration of a receiver according to afirst embodiment;

FIG. 2 is a figure showing a configuration of a receiver according to asecond embodiment;

FIG. 3 is a figure showing a detailed configuration of DAC;

FIG. 4 is a figure showing a configuration of a temperature coefficientsetting section in which three kinds of resistances are connected inseries;

FIG. 5 is a figure showing a configuration of the temperaturecoefficient setting section in which three kinds of resistances areconnected in parallel; and

FIG. 6 is a figure showing a configuration of the temperaturecoefficient setting section in which three kinds of resistances areconnected in series and in parallel.

BEST MODE FOR CARRYING OUT THE INVENTION

Hereafter, a receiver of an embodiment in which a double conversionsystem according to the present invention is adopted will be describedwith reference to the accompanying drawings.

FIG. 1 is a figure showing a configuration of a receiver according to afirst embodiment. The receiver of double conversion system according tothe first embodiment shown in FIG. 1 is constituted by including anantenna tuning circuit 10, a high frequency amplification circuit 20,mixing circuits 22, 28, local oscillators 24, 30, intermediate frequencyfilters 26, 32, an intermediate frequency amplification circuit 34, adetecting circuit 36, a PLL circuit 38, a control section 40, a DAC(digital-analog converter) 42, and an operation section 44.

The antenna tuning circuit 10 is constituted by a tuning coil 11, acapacitor 12 and a variable-capacitance diode 13. The tuning coil 11 andthe variable-capacitance diode 13 are connected in parallel, and theirparallel resonance frequency is made to match with a frequency of abroadcast wave desired to be received, thereby making radio waves ofother broadcasting stations other than the desired broadcast wave andother noises, etc. attenuated. A capacitor 12 is provided for applying acontrol voltage of reverse bias across the variable-capacitance diode13. A bar antenna in which a conducting wire is wound around a magneticcore, or a loop antenna in which a conducting wire is wound in a loopshape is used as the tuning coil 11. In the case where the bar antennais used as the tuning coil 11, the fluctuation of magnetic flux due tothe effect of a human body present in the vicinity can be suppressed tominimum, so that the broadcast wave can be stably received. The use of aferrite core having a large magnetic permeability as the magnetic core,also enables a large electromotive voltage to be obtained, therebyimproving the reception sensitivity. In the case where the loop antennais used as the tuning coil 11, the loop antenna can be easily formed byusing a casing of a portable receiver, etc.

The high frequency amplification circuit 20 performs high frequencyamplification for a signal outputted from the antenna tuning circuit 10.The mixing circuit 22 (a first mixing circuit) mixes a signal outputtedfrom the high frequency amplification circuit 20 with a localoscillation signal outputted from the local oscillator 24. If thefrequency of the signal outputted from the high frequency amplificationcircuit 20 is f1 and the frequency of the local oscillation signal isf2, signals having frequency components of (f2±f1) are outputted fromthe mixing circuit 22.

The intermediate frequency filter 26 passes only a predeterminedfrequency component of a signal outputted from the mixing circuit 22.For example, the center frequency of the pass band is set to 10.7 MHz,and the broadcast wave in which (f2−f1) becomes 10.7 MHz is selected bythe intermediate frequency filter 26. That is, in the case where thebroadcast wave of frequency f1 is desired to be received, the frequencyof the local oscillation signal inputted to the mixing circuit 22 fromthe local oscillator 24 may be set to (f1+10.7 MHz).

The mixing circuit 28 (a second mixing circuit) mixes a signal outputtedfrom the intermediate frequency filter 26 with a local oscillationsignal outputted from the local oscillator 30. If the frequency of thesignal outputted from the intermediate frequency filter 26 is f3 (=10.7MHz) and the frequency of the local oscillation signal outputted fromthe local oscillator 30 is f4, signals of frequency components of(f3±f4) are outputted from the mixing circuit 28.

The intermediate frequency filter 32 passes only a predeterminedfrequency component of a signal outputted from the mixing circuit 28.For example, the center frequency of the pass band is set to 450 kHz,and the component in which (f3−f4) becomes 450 kHz is selected by theintermediate frequency filter 32.

In this way, the frequency of the signal outputted from the highfrequency amplification circuit 20 is converted to a frequency higherthan the frequency of the broadcast wave by the former-stage mixingcircuit 22. In addition, the frequency of the signal outputted from theformer-stage mixing circuit 22 is converted to a frequency lower thanthe frequency of the broadcast wave by the latter-stage mixing circuit28.

The intermediate frequency amplification circuit 34 amplifies anintermediate frequency signal of 450 kHz outputted from the intermediatefrequency filter 32. The detecting circuit 36 applies a predetermineddetection processing, for example, an AM detection processing, to theintermediate frequency signal which has been amplified by theintermediate frequency amplification circuit 34, so as to output a voicesignal.

The local oscillator 24 generates the local oscillation signal offrequency f2 (=f1−10.7 MHz) to be inputted to the first stage mixingcircuit 22. The PLL circuit 38 constituting a frequency synthesizertogether with the local oscillator 24, enables the oscillation frequencyof the local oscillator 24 to be set by a predetermined step, by meansof the division ratio of a variable frequency divider (not shown) in thePLL circuit 38 being changed by the control section 40. As a result,when the broadcast frequency of AM broadcasting is assumed to be set atan interval of 9 kHz for am example, it is possible to set the receptionfrequency equal to the broadcast frequency.

The local oscillator 30 generates the local oscillation signal of thefrequency f4 (=10.25 MHz) to be inputted to the second-stage mixingcircuit 28. Since the frequency f3 (=10.7 MHz) of the signal outputtedfrom the intermediate frequency filter 26 is fixed, the fixedoscillation frequency f4 is set in the local oscillator 30.

The control section 40 changes the oscillation frequency of the localoscillator 24, and also changes the tuning frequency of the antennatuning circuit 10. However, in the present embodiment, since thereception frequency band (about 500 to 1600 kHz) of AM broadcasting isgreatly different from the frequency (about 10 MHz) of the localoscillation signal generated by the local oscillator 24, only the use ofa padding capacitor etc. is not sufficient to prevent the tracking errorfrom exceeding a permissible range, when the control voltage generatedby the PLL circuit 38 is applied as it is to the variable-capacitancediode 13 in the antenna tuning circuit 10. For this reason, the controlsection 40 inputs to the DAC 42 a frequency setting data required forsetting an accurate tuning frequency corresponding to the oscillationfrequency of the local oscillator 24, so as to enable a control voltagecorresponding to the setting data to be generated by the DAC 42. Thetuning circuit of the antenna tuning circuit 10 is set so as to settlethe tracking error within the permissible range by applying the controlvoltage thus generated to the variable-capacitance diode 13.

The operation section 44 is provided in order that the user of thereceiver performs channel selection instruction etc., and contents ofthe user's operation are sent to the control section 40.

As described above, the receiver according to the present embodiment, inwhich the double conversion system is adopted, and in which the antennatuning circuit 10 is provided in the former stage of the high frequencyamplification circuit 20, is there by capable of surely removingunwanted components, such as a radio wave of an undesired broadcastingstation and a noise, etc. which are included in the received broadcastwave. Since the tuning coil 11 in the antenna tuning circuit 10 can beused as an antenna, as compared with the case where the tuning circuitis provided for a subsequent stage of high frequency amplificationcircuit, the coil for tuning and the antenna need not be providedseparately, so that the number of components can be reduced.

FIG. 2 is a figure showing a configuration of a receiver according to asecond embodiment. The receiver of double conversion system according tothe second embodiment shown in FIG. 2 is different from the receiveraccording to the first embodiment in that the high frequencyamplification circuit 20, the mixing circuits 22, 28, the localoscillators 24, 30, the intermediate frequency filters 26, 32, theintermediate frequency amplification circuit 34, the detecting circuit36, the PLL circuit 38, the control section 40, and the DAC 42, whichare shown in FIG. 1, are realized by a semiconductor device 100 formedon a same semiconductor substrate, and in that the DAC 42 has atemperature coefficient and the control voltage, which is an output ofthe DAC 42, changes in accordance with ambient temperature.

FIG. 3 is a figure showing a detailed configuration of the DAC 42. Asshown in FIG. 3, the DAC 42 is constituted by including FETs 110, 111,120, 121, 122, 130, 131, 132, 140, 141, 142, a current source 112,analog switches 123, 133, . . . , 143, inverter circuits 124, 134, . . ., 144 and a temperature coefficient setting section 150.

A first current mirror circuit is constituted by using the FETs 110,111, the current source 112, the FETs 120, 121, and thevalidity/invalidity of operation of the first current mirror circuit arecontrolled by a switching circuit constituted by the inverter circuit124, the FET 122 and the analog switch 123. The first current mirrorcircuit corresponds to the first bit d₁ of input data of the DAC 42.Since both the analog switch 123 and the FET 122 are turned on when thefirst bit d₁ is “1”, i.e. the signal inputted to the inverter circuit124 is at a high-level, the operation of the first current mirrorcircuit is effective for allowing a predetermined current I₁ to flow.

Also, a second current mirror circuit is constituted by using the FETs110, 111, the current source 112 and the FETs 130, 131, and thevalidity/invalidity of operation of the second current mirror circuit iscontrolled by a switching circuit constituted by the inverter circuit134, the FET 132 and the analog switch 133. The second current mirrorcircuit corresponds to the second bit d₂ of input data of the DAC 42.Since both the analog switch 133 and the FET 132 are turned on when thesecond bit d₂ is “1”, i.e. the signal inputted to the inverter circuit134 is at a high-level, the operation of the second current mirrorcircuit is effective for allowing a predetermined current I₂ to flow.

Similarly, an n-th current mirror circuit is constituted by using theFETs 110, 111, the current source 112 and the FETs 140, 141, and thevalidity/invalidity of operation of the n-th current mirror circuit iscontrolled by a switching circuit constituted by the inverter circuit144, the FET 142 and the analog switch 143. The n-th current mirrorcircuit corresponds to the n-th bit d_(n) of input data of the DAC 42.Since both the analog switch 143 and the FET 142 are turned on when then-th bit d_(n) is “1”, i.e. the signal inputted to the inverter circuit144 is at a high-level, the operation of the n-th current mirror circuitis effective for allowing a predetermined current I_(n) to flow.

In present embodiment, among n-bit data inputted to the DAC 42, thefirst bit d₁ corresponds to the least significant bit, and the n-th bitd_(n) corresponds to the most significant bit. If the current I₁generated by the first current mirror circuit is defined as 1, the gatewidth (channel width) W and the gate length (channel length) L of eachFET are set so that the currents I₂, I₃, . . . I_(n) generated by thesecond, the third, . . . and the n-th current mirror circuits becometwice (=2¹), four (=2²) times, . . . , 2^((n-1)) times the current I₁.

The above-described first to n-th current mirror circuits are connectedin parallel so as to form a current source, and when two or more currentmirrors operate simultaneously, each of the current generated by theplurality of current mirror circuits is added together. Accordingly, itis possible to generate a current corresponding to the value of inputdata by selectively operating the above-described first to n-th currentmirror circuits in correspondence with the value of each bit of theinput data. The current thus generated is supplied to the temperaturecoefficient setting section 150.

The temperature coefficient setting section 150 is a combined resistanceconstituted by combining a plurality of resistances, each having adifferent temperature coefficient, and a device constant (resistancevalue) of the combined resistance as a whole changes in accordance withambient temperature. It is generally known that the temperaturecoefficient of the resistance which is formed on a semiconductorsubstrate by a semiconductor manufacturing process can be easilydifferentiated to about three kinds of temperature coefficient bydevising kinds and concentration of impurity. For example, in the casewhere the resistance is formed with a poly-silicon on a semiconductorsubstrate, the temperature coefficient from − several thousands to +several hundreds ppm/° C. can be easily realized by adjusting impurityconcentration and carrier types (p-type or n-type). Alternatively, thediffusion resistance of a p-type region or an n-type region formed on asemiconductor substrate is utilized instead of the poly-silicon, and thetemperature coefficient from − several thousands to + several hundredsppm/° C. can be easily realized by adjusting impurity concentration andcarrier types. In view of the case where three kinds of resistances R1,R2, R3 whose temperature coefficients are largely different can beformed on a semiconductor substrate, the temperature coefficient of thetemperature coefficient setting section 150 as a whole can be freely setwithin a predetermined range by devising values and connection methodsof the three kinds of resistances R1 to R3.

FIG. 4 is a figure showing a configuration of the temperaturecoefficient setting section 150 in which three kinds of resistances areconnected in series. When each resistance value of three kinds ofresistances R1 to R3 are defined as r₁, r₂, r₃, and each temperaturecoefficient of the three kinds of resistances R1 to R3 are defined asa₁, a₂, a₃, the temperature coefficient b₁ of the temperaturecoefficient setting section 150 shown in FIG. 4 as a whole is expressedas follows.b ₁=(a ₁ r ₁ +a ₂ r ₂ +a ₃ r ₃)/(r ₁ +r ₂ +r ₃)When a current supplied to the temperature coefficient setting section150 is defined as I, the output voltage V_(out) of the DAC 42 appearingat one end of the temperature coefficient setting section 150 isexpressed as follows.V _(out)=(r ₁ +r ₂ +r ₃) IThe output voltage V_(out) fluctuates by ΔV=(a₁r₁+a₂r₂+a₃r₃) I, whenambient temperature is changed by 1° C.

FIG. 5 is a figure showing a configuration of the temperaturecoefficient setting section 150 in which three kinds of resistances areconnected in parallel. The temperature coefficient b₂ of the temperaturecoefficient setting section 150 shown in FIG. 5 as a whole is expressedas follows.b ₂ =a ₁ a ₂ a ₃(r ₁ r ₂ +r ₂ r ₃ +r ₃ r ₁)/(a ₁ a ₂ r ₁ r ₂ +a ₂ a ₃ r₂ r ₃ +a ₃ a ₁ r ₃ r ₁)The output voltage V_(out) of the DAC 42 appearing at one end of thetemperature coefficient setting section 150 is expressed as follows.V _(out) =r ₁ r ₂ r ₃ I/(r ₁ r ₂ +r ₂ r ₃ +r ₃ r ₁)The output voltage V_(out) fluctuates byΔV=a₁a₂a₃r₁r₂r₃I/(a₁a₂r₁r₂+a₂a₃r₂r₃+a₃a₁r₃r₁), when ambient temperatureis changed by 1° C.

FIG. 6 is a figure showing a configuration of the temperaturecoefficient setting section 150 in which the three kinds of resistancesare connected in series and in parallel. The temperature coefficient b₃of the temperature coefficient setting section 150 shown in FIG. 6 as awhole is expressed as follows.b ₃=(a ₁ r ₁ +a ₂ a ₃ r ₂ r ₃/(a ₂ r ₂ +a ₃ r ₃))/(r ₁ +r ₂ r ₃/(r ₂ +r₃))The output voltage V_(out) of the DAC 42 appearing at one end of thetemperature coefficient setting section 150 is expressed as follows.V _(out)=(r ₁ +r ₂ r ₃/(r ₂ +r ₃)) IThe output voltage V_(out) fluctuates by ΔV=(a₁r₁+a₂a₃r₂r₃/(a₂r₂+a₃r₃))I, when ambient temperature is changed by 1° C.

As described above, the DAC 42 included in the semiconductor device 100according to the present embodiment is provided with the temperaturecoefficient setting section 150 having a predetermined temperaturecoefficient, so that the temperature characteristic of the DAC 42 aswhole can be set arbitrarily within a predetermined range. Inparticular, since the voltage across the temperature coefficient settingsection 150 generated when the current generated by the current sourceconstituted by connecting the plurality of current mirror circuits flowsinto the temperature coefficient setting section 150, is arranged to bethe output voltage of the DAC 42, the output voltage of the DAC 42 canbe easily changed in accordance with the temperature coefficient of thetemperature coefficient setting section 150. Thereby, even if the datainputted from the control section 40 is fixed, when ambient temperaturechanges, the output voltage V_(out) is arranged to change in accordancewith the ambient temperature.

Further, the temperature coefficient can be set arbitrarily to someextent by changing connection methods of the three kinds of resistancesR1 to R3 in the temperature coefficient setting section 150, or bychanging each temperature coefficient of the resistances R1 to R3.Accordingly, when the voltage applied by the PLL circuit 38 to the localoscillator 24 changes in accordance with ambient temperature, the outputvoltage of the DAC 42 can also be changed similarly, thereby enablingthe expansion of tracking error resulting from the temperature change tobe prevented.

The DAC 42 and the antenna tuning circuit 10 according to the presentembodiment are also constituted without using expensive components, suchas the temperature compensating capacitor, so that component costs canbe reduced. Further, the temperature coefficient setting section 150 inthe DAC 42 can be realized by controlling kinds and concentration ofimpurities by using semiconductor processes, such as a CMOS process or aMOS process, so that the components for temperature compensation can beformed on a semiconductor substrate. For this reason, in the case whereeach component constituting the receiver shown in FIG. 2 is formed on asemiconductor substrate, external components can be reduced so as toeffect further cost reduction in facilitating manufacturing and inreducing the number of components.

The present invention is not limited to the above-described embodiments,and various variations are possible within the scope and spirit of theinvention. For example, although the DAC 42 for generating a current inaccordance with a value of each bit of input data is explained in thesecond embodiment described above, the present invention may also beapplied to a receiver, etc. in which a DAC using other method, forexample, DAC of R-2R resistance type or load resistor type, etc. isused. In these cases, the temperature coefficient setting section 150may be comprised in a power supply for generating a predeterminedoperating voltage, so as to change in accordance with ambienttemperature the value of the operating voltage generated by the powersupply. This method may also be applied to the current-type DAC 42 shownin FIG. 3. That is, in FIG. 3, the temperature coefficient settingsection 150 may be replaced by a resistance having a fixed resistancevalue, and a power supply which includes the temperature coefficientsetting section 150, and of which output voltage is changed inaccordance with ambient temperature, may be provided so as to apply theoutput voltage of the power supply to each drain of the FETs 110, 120,130, . . . , 140.

Although the case where the temperature coefficient setting section 150included in the DAC 42 is constituted by combining three kinds ofresistances R1 to R3 having different temperature coefficients isexplained in the above-described second embodiment, in the case wherefour or more kinds of resistances having different temperaturecoefficients can be formed by changing kinds and concentration ofimpurities which are added by diffusion and implantation in asemiconductor process, the temperature coefficient setting section 150may also be constituted by combining these four or more kinds ofresistances. Alternatively, in the case where a predeterminedtemperature coefficient can be obtained by combining two kinds ofresistances, or by using a kind of resistance, the temperaturecoefficient setting section 150 may be arranged to be constituted byusing two kinds of resistances or a kind of resistance.

Although the temperature coefficient of the DAC 42 as a whole is made toreach a desired value by devising combination of resistances in thetemperature coefficient setting section 150, in the case where eachcomponent other than the temperature coefficient setting section 150 inthe DAC 42 has a temperature coefficient which can not be neglected, thetemperature coefficient of the temperature coefficient setting section150 may also be set so as to allow the temperature coefficient of theDAC 42 as a whole, including these components and the temperaturecoefficient setting section 150, to reach a predetermined value.

Although the antenna tuning circuit 10 having the resonance circuit inwhich the resonance coil 11 and the variable-capacitance diode 13 areconnected in parallel is explained in the above-described embodiments,the resonance circuit in which these elements are connected in seriesmay also be arranged to be included.

INDUSTRIAL APPLICABILITY

As described above, the receiver according to the present invention, inwhich the double conversion system is adopted, and in which the antennatuning circuit is provided in the former stage of the high frequencyamplification circuit, is thereby capable of surely removing unwantedcomponents, such as a radio wave of an undesired broadcasting stationand a noise, etc. which are included in the received broadcast wave.Since the tuning coil in the antenna tuning circuit can be used as anantenna, as compared with the case where the tuning circuit is providedfor a subsequent stage of high frequency amplification circuit, the coilfor tuning and the antenna need not be provided separately, so that thenumber of components can be reduced.

1. A receiver of double conversion system comprising: an antenna tuning circuit including a tuning coil and a variable-capacitance diode; a high frequency amplification circuit for performing high frequency amplification for a signal outputted from said antenna tuning circuit; first and second mixing circuits for performing frequency conversion twice for an output of said high frequency amplification circuit; and a detecting circuit for performing detection processing for an output of said second mixing circuit.
 2. The receiver of double conversion system according to claim 1, wherein said first mixing circuit converts a frequency of a signal outputted from said high frequency amplification circuit to a frequency higher than a frequency of a broadcast wave, and wherein said second mixing circuit converts a frequency of a signal outputted from said first mixing circuit to a frequency lower than the frequency of the broadcast wave.
 3. The receiver of double conversion system according to claim 1, wherein said tuning coil included in said antenna tuning circuit is a bar antenna in which a conducting wire is wound around a magnetic core.
 4. The receiver of double conversion system according to claim 1, wherein said tuning coil included in said antenna tuning circuit is a loop antenna in which a conducting wire is wound in a loop shape.
 5. The receiver of double conversion system according to claim 1, further comprising: a digital-analog converter for generating a control voltage for setting a tuning frequency applied to said variable-capacitance diode included in said antenna tuning circuit; a local oscillator for inputting a local oscillation signal whose frequency is variable to said first mixing circuit to which an output signal of said high frequency amplification circuit is inputted; and a control section for setting the frequency of the local oscillation signal outputted from said local oscillator, and for generating a frequency setting data required for associating the tuning frequency of said antenna tuning circuit with the frequency of the local oscillation signal, and for inputting the frequency setting data to said digital-analog converter.
 6. The receiver of double conversion system according to claim 5, wherein said digital-analog converter changes the control voltage with a predetermined temperature coefficient in accordance with ambient temperature.
 7. The receiver of double conversion system according to claim 6, wherein said digital-analog converter comprises a temperature coefficient setting section constituted by including elements having predetermined temperature coefficients, and wherein a device constant of said temperature coefficient setting section as a whole is changed in accordance with ambient temperature.
 8. The receiver of double conversion system according to claim 7, wherein said digital-analog converter, said high frequency amplification circuit, said first and second mixing circuits, said detecting circuit and said local oscillator are formed on a same semiconductor substrate, wherein said temperature coefficient setting section includes a plurality of resistances which are formed by a semiconductor manufacturing process and which have temperature coefficients different to each other, and wherein a connection form of said plurality of resistances is set so that a temperature coefficient of said digital-analog converter reaches a predetermined value.
 9. The receiver of double conversion system according to claim 8, wherein each of said plurality of resistances is formed by a poly-silicon on a semiconductor substrate, and wherein the temperature coefficients of the resistances are made to be different by adjusting impurity concentration and carrier types of said poly-silicon.
 10. The receiver of double conversion system according to claim 8, wherein each of said plurality of resistances is formed by utilizing a p-type region or a n-type region on a semiconductor substrate, and wherein the temperature coefficients of the resistances are made to be different by adjusting impurity concentration and carrier types of said p-type region or said n-type region.
 11. The receiver of double conversion system according to claim 7, wherein said digital-analog converter comprises: a current source of which current value is set in accordance with a value of said inputted frequency setting data; and said temperature coefficient setting section into which the current generated by the current source flows, and wherein a voltage across said temperature coefficient setting section is outputted as said control voltage. 